Method of manufacturing semiconductor device and method of cleaning semiconductor substrate

ABSTRACT

A method of manufacturing a semiconductor device includes: holding a semiconductor substrate with a surface inclined with respect to the vertical direction and the horizontal direction; and immersing the semiconductor substrate in a cleaning solution including an acid.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of priority from Japanese PatentApplication No. 2011-40544 filed on Feb. 25, 2011, the entire contentsof which are incorporated herein by reference.

FIELD

The embodiments discussed herein are related to a method ofmanufacturing a semiconductor device and a method of cleaning asemiconductor substrate.

BACKGROUND

Electron devices in which a GaN layer used as an electron transportlayer and an AlGaN layer are disposed on a substrate, for example,compound semiconductor devices, include a GaN-based high electronmobility transistor (HEMT). In a GaN-based HEMT, a high-concentrationtwo-dimensional electron gas (2DEG) generated at the heterojunctioninterface between AlGaN and GaN is used.

The bandgap of GaN is 3.4 eV, which is larger than the bandgap of Si(1.1 eV) and the bandgap of GaAs (1.4 eV). GaN has a high breakdownfield strength and a high saturated electron velocity. GaN may be usedas the material for a high-voltage operating and high-output compoundsemiconductor device, for example, the material for a semiconductordevice for power supply. Compound semiconductor devices using aGaN-based compound semiconductor may be used as high-efficiencyswitching devices or high breakdown voltage power devices for electriccars. Si laterally diffused metal oxide semiconductor (LDMOS)transistors or GaAs field effect transistors (FETs) may not be suitablefor high-output, high-efficiency, or high-voltage operation.

Related art is disclosed in Japanese Laid-open Patent Publication No.2009-164226 and Japanese Laid-open Patent Publication No. 9-260331.

SUMMARY

According to one aspect of the embodiments, a method of manufacturing asemiconductor device includes: holding a semiconductor substrate with asurface inclined with respect to the vertical direction and thehorizontal direction; and immersing the semiconductor substrate in acleaning solution including an acid.

Additional advantages and novel features of the invention will be setforth in part in the description that follows, and in part will becomemore apparent to those skilled in the art upon examination of thefollowing or upon learning by practice of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A to 1H illustrate an exemplary method of manufacturing asemiconductor device;

FIGS. 2A and 2B illustrate an exemplary cleaning apparatus;

FIG. 3 illustrates an exemplary cleaning tank;

FIGS. 4A and 4B illustrate an exemplary cleaning apparatus;

FIGS. 5A and 5B illustrate an exemplary cleaning apparatus;

FIGS. 6A and 6B illustrate an exemplary cleaning apparatus;

FIGS. 7A and 7B each illustrate exemplary residual particles;

FIG. 8 illustrates an exemplary high-output amplifier;

FIG. 9A illustrates an exemplary power factor correction (PFC) circuit;and

FIG. 9B illustrates an exemplary power supply device.

DESCRIPTION OF EMBODIMENTS

In order to produce a GaN-based HEMT having good characteristics,residues such as particles generated in the production process may beremoved. For example, in a GaN-based HEMT having a gate recess structurewhich enables normally “off” operation, in order to reduce the increasein leakage current caused by residues, the fluctuation in thresholdvoltage due to charge trapping, and the like, cleaning is performedbetween the formation of the recess and the formation of agate-insulating film.

FIGS. 1A to 1H illustrate an exemplary method of manufacturing asemiconductor device. In the manufacturing method illustrated in FIGS.1A to 1H, a GaN-based HEMT may be manufactured.

As illustrated in FIG. 1A, a nucleation layer 2, an electron transportlayer 3, an electron supply layer 4, and a cap layer 5 are formed on asubstrate 1. The substrate 1 may be, for example, a SiC substrate. Thenucleation layer 2 may be, for example, an AlN layer or AlGaN layer. Theelectron transport layer 3 may be, for example, a non-doped i-GaN layer.The electron supply layer 4 may be, for example, an n-type n-AlGaNlayer. Before formation of the n-type n-AlGaN layer, a non-doped i-AlGaNlayer may be formed as a spacer layer. The cap layer 5 may be, forexample, an n-type n-GaN layer. The nucleation layer 2, the electrontransport layer 3, the electron supply layer 4, and the cap layer 5 maybe formed by a crystal growth method, such as a metal organic vaporphase epitaxy (MOVPE) method. Depending on the selection of sourcematerial gases, these layers may be continuously formed. As the sourcematerial for aluminum (Al) and the source material for gallium (Ga), forexample, trimethylaluminum (TMA) and trimethylgallium (TMG) may be usedrespectively. As the source material for nitrogen (N), for example,ammonia (NH₃) may be used. The source material for silicon (Si) includedas an impurity in the electron supply layer 4, e.g., an n-AlGaN layer,or the cap layer 5, e.g., an n-GaN layer, for example, silane (SiH₄) maybe used.

The thickness of the electron transport layer 3 may be, for example,about 3 μm. The thickness of the electron supply layer 4 may be, forexample, about 30 nm. When a spacer layer is provided, the thickness ofthe spacer layer may be, for example, about 5 nm. The thickness of thecap layer 5 may be, for example, 10 nm. In the spacer layer, e.g., ani-AlGaN layer, and the electron supply layer 4, e.g., an n-AlGaN layer,the Al compositional ratio may be, for example, about 0.2. The electronsupply layer 4, e.g., an n-AlGaN layer, and the cap layer 5, e.g., ann-GaN layer, may be doped with Si as an n-type impurity, in an amount ofabout 5×10¹⁸ cm⁻³.

In such a stacked structure, a two-dimensional electron gas (2DEG) isgenerated near the interface between the electron transport layer 3 andthe electron supply layer 4. Strain between the electron transport layer3 and the electron supply layer 4 increases owing to the cap layer 5,which causes a piezoelectric effect, resulting in an increase in 2DEG.Consequently, the on-state current of the GaN-based HEMT decreases,which may enable high current operation of GaN-based HEMT.

As illustrated in FIG. 1B, a recessed portion 6 s and a recessed portion6 d are respectively formed in a source electrode-forming region and ina drain electrode-forming region of the cap layer 5, the electron supplylayer 4, and the electron transport layer 3. In forming the recessedportions 6 s and 6 d, a resist pattern having openings to expose regionsfor forming recessed portions 6 s and 6 d is formed. Using the resistpattern as an etching mask, the cap layer 5, the electron supply layer4, and the electron transport layer 3 are dry-etched. The resist patternis removed by ashing or the like. In the dry etching, for example, achlorine-based gas may be used as an etching gas. The dry etching may beperformed, for example, under the conditions in which the flow rate ofthe etching gas is set at 30 sccm, the pressure is set at 2 Pa, and theapplied RF power is set at 20 W. The depth of the recessed portions 6 sand 6 d may be arbitrarily set as long as a certain amount of electriccurrent attributed to 2DEG flows.

As illustrated in FIG. 1C, a source electrode 7 s is formed in therecessed portion 6 s, and a drain electrode 7 d is formed in therecessed portion 6 d. In forming the source electrode 7 s and the drainelectrode 7 d, a resist pattern having an opening to expose the regionfor forming the source electrode 7 s and an opening to expose the regionfor forming the drain electrode 7 d is formed. Using the resist patternas a deposition mask, a conductive film is formed. The conductive filmattached to the resist pattern and the resist pattern are removed. Forexample, the source electrode 7 s and the drain electrode 7 d may beformed by a lift-off process. For example, a Ta film with a thickness ofabout 20 nm may be formed. An Al film with a thickness of about 200 nmmay be formed on the Ta film. The Ta film and the Al film may be formed,for example, by a vapor deposition method. After the resist pattern isremoved, heat treatment is performed at 400° C. to 1,000° C., forexample at 550° C., in a nitrogen atmosphere, thereby establishing anohmic contact.

As illustrated in FIG. 1D, a recess 6 g is formed in a region forforming a gate electrode 7 g of the cap layer 5 and the electron supplylayer 4. In forming the recess 6 g, a resist pattern including anopening to expose a region for forming the recess 6 g is formed. Usingthe resist pattern as an etching mask, the cap layer 5 and the electronsupply layer 4 are dry-etched. The resist pattern is removed by ashingor the like. In the dry etching, for example, a chlorine-based gas maybe used as an etching gas.

After the recess 6 g is formed, by cleaning the inside of the recess 6 gby a certain method, etching residues, resist residues, or the like maybe removed.

As illustrated in FIG. 1E, a gate-insulating film 8 that follows theinner surface of the recess 6 g is formed. The gate-insulating film 8may be, for example, an aluminum oxide film, a hafnium oxide film, asilicon oxide film, an aluminum nitride film, a hafnium nitride film, asilicon nitride film, or the like. The gate-insulating film 8 may beformed by an atomic layer deposition (ALD) method or the like. Thethickness of the gate-insulating film 8 may be about 5 to 100 nm, forexample, about 40 nm.

As illustrated in FIG. 1F, a lower layer resist pattern 10 a includingan opening 10 c to expose a region for forming a gate electrode and anupper resist pattern 10 b including an opening 10 d which is narrowerthan the opening 10 c is formed on the gate-insulating film 8. Informing the lower layer resist pattern 10 a and the upper layer resistpattern 10 b, an alkali-soluble resin, such as PMGI (trade name)manufactured by MicroChem Corp., U.S.A., is applied onto thegate-insulating film 8, for example, by a spin coating method, followedby heat treatment to form a resist film. Then, a photosensitive resistmaterial, such as PFI32-A8 (trade name) manufactured by SumitomoChemical Co., Ltd. is applied, for example, by a spin coating method,followed by heat treatment to form a resist film. By performingultraviolet exposure, an opening 10 d with a width of about 0.8 μm isformed in the upper layer resist film, and thus the upper resist pattern10 b including the opening 10 d is formed. Using the upper layer resistpattern 10 b as a mask, the lower layer resist film is wet-etched withan alkaline developer. Thereby, the lower layer resist pattern 10 ahaving an opening 10 c is formed. For example, as illustrated in FIG.1F, a multilayer resist film having an eaves-like structure is formed.

As illustrated in FIG. 1G, a gate electrode 7 g is formed on thegate-insulating film 8 so as to fill the recess 6 g. In forming the gateelectrode 7 g, using the lower resist pattern 10 a and the upper resistpattern 10 b as a deposition mask, a conductive film is formed. Theconductive film attached to the upper layer resist pattern 10 b, thelower layer resist pattern 10 a, and the upper layer resist pattern 10 bare removed. The gate electrode 7 g is formed by a lift-off process. Forexample, an Ni film with a thickness of about 10 nm may be formed. An Aufilm with a thickness of about 300 nm may be formed on the Ni film. TheNi film and the Au film may be formed, for example, by a vapordeposition method. The lower layer resist pattern 10 a and the upperlayer resist pattern 10 b may be removed, for example, using a heatedorganic solvent.

As illustrated in FIG. 1H, a protective film 9 is formed. Contact holes,interconnect lines, and the like are formed. In this way, a GaN-basedHEMT is fabricated.

FIGS. 2A and 2B illustrate an exemplary cleaning apparatus. The insideof the recess 6 g may be cleaned with the cleaning apparatus illustratedin FIGS. 2A and 2B. FIG. 2B is a cross-sectional view taken along theline IIB-IIB of FIG. 2A.

A cleaning apparatus 61 houses a plurality of semiconductor substrates20. The cleaning apparatus 61 is provided with four wall members 24 suchthat a rectangular cylinder is formed. A supporting member 21 whichsupports semiconductor substrates 20 is provided inside of a pair ofwall members 24. A plurality of lower locking members 22 are providedinside of the pair of wall members 24 at positions higher than thesupporting member 21. A plurality of upper locking members 23 areprovided at positions higher than the lower locking members 22 andsifted from the lower locking members 22 in plan view. The position inthe horizontal direction of a semiconductor substrate 20 is determinedby a pair of a lower locking member 22 and an upper locking member 23,and the position in the vertical direction of the semiconductorsubstrate 20 is determined by the supporting member 21. Since the upperlocking member 23 is provided at a position different from that of thelower locking members 22 in plan view, a direction normal to the surfaceof the semiconductor substrate 20 is inclined from the horizontaldirection.

For example, a substrate 1 including a recess 6 g and the like, as asemiconductor substrate 20, may be placed in the cleaning apparatus 61.FIG. 3 illustrates an exemplary cleaning tank. As illustrated in FIG. 3,the cleaning apparatus 61 is immersed in a cleaning solution 26 filledin a cleaning tank 25, and acid cleaning is performed. The cleaningsolution 26 may include, for example, a sulfuric acid-hydrogen peroxidemixture or hydrofluoric acid. A sulfuric acid-hydrogen peroxide mixturemay remove resist residues, and hydrofluoric acid may remove compoundsemiconductor residues. After acid cleaning is performed, water washingand spin drying may be performed.

In the acid cleaning, a reaction between the cleaning solution 26 andforeign substances on the semiconductor substrate 20 may cause bubblesto form. For example, on the surface of the semiconductor substrate 20facing upward in the vertical direction, bubbles may float upward in thevertical direction. Retention of bubbles may be unlikely to occur on thesurface, and the surface may be effectively cleaned. By reversing thesemiconductor substrate 20, a surface opposite to the surface may beefficiently cleaned. For example, when the upper locking members 23and/or the lower locking members 22 are moved in the horizontaldirection, upper and lower surfaces are easily reversed. The angle ofthe normal direction of the surface of the semiconductor substrate 20with respect to the horizontal direction may be 10° to 80°. For example,when the angle is less than 10°, bubbles generated on the lower portionof the surface facing upward in the vertical direction may pass in thevicinity of the surface and float up. As a result, uneven cleaning mayoccur. When the angle exceeds 80°, bubbles may be retained on thesurface facing downward in the vertical direction, and the cleaningefficiency at the surface facing downward in the vertical direction maybe decreased.

A plurality of semiconductor substrates 20 may be disposed with adistance between adjacent semiconductor substrates 20. For example,there may be no overlapping portions in plan view. Interference among aplurality of semiconductor substrates 20 may be reduced. As a result,bubbles generated on one semiconductor substrate 20 located at the lowerposition may not come into contact with another semiconductor substrate20 located at the upper position, and cleaning efficiency of the othersemiconductor substrate 20 may be improved.

Since bubbles generated during cleaning are efficiently removed,cleaning efficiency may be improved.

FIGS. 4A and 4B illustrate an exemplary cleaning apparatus. FIG. 4B is across-sectional view taken along the line IVB-IVB of FIG. 4A. FIGS. 5Aand 5B illustrate an exemplary cleaning apparatus. FIG. 5B is across-sectional view taken along the line VB-VB of FIG. 5A. FIGS. 6A and6B illustrate an exemplary cleaning apparatus. FIG. 6B is across-sectional view taken along the line VIB-VIB of FIG. 6A.

A cleaning apparatus 62 illustrated in FIGS. 4A and 4B includes a case33 which supports four wall members 24 from the outside. A apparatussupporting member 34 which supports the wall members 24 from below isprovided on the lower end of the case 33. The apparatus supportingmember 34 may protrude inward from the lower end of the case 33 by alength that is substantially equal to the thickness of the supportingmember 21 which supports semiconductor substrates 20. The cleaningapparatus 62 is provided with a holding member 32 which holds and fixessemiconductor substrates 20 from above and a rotary driving member 31which rotates the case 33 around an axis extending in the horizontaldirection.

When acid cleaning is performed using the cleaning apparatus 62, forexample, as illustrated in FIG. 3, the cleaning apparatus 62 is immersedin a cleaning solution 26 filled in a cleaning tank 25, and the case 33is rotated by the rotary driving member 31. Along with the rotation, twosurfaces of each semiconductor substrate 20 alternately face upward inthe vertical direction. Consequently, the two surfaces of thesemiconductor substrate 20 may be cleaned with high efficiency. Sincethe holding member 32 is provided, dropping of semiconductor substrates20 is reduced.

A cleaning apparatus 63 illustrated in FIGS. 5A and 5B is provided witha rod-like rotary driving member 41 which is in contact with the upperend of each of semiconductor substrates 20 and rotates around an axisextending in the horizontal direction.

When acid cleaning is performed using the cleaning apparatus 63, forexample, as illustrated in FIG. 3, the cleaning apparatus 63 is immersedin a cleaning solution 26 filled in a cleaning tank 25, and the rotarydriving member 41 rotates. Since the rotary driving member 41 is incontact with the upper ends of semiconductor substrates 20, along withthe rotation of the rotary driving member 41, the semiconductorsubstrates 20 rotate in a space surrounded by wall members 24. Retentionof bubbles on two surfaces of each of the semiconductor substrates 20 isreduced, and the two surfaces are cleaned with high efficiency.

The cleaning apparatuses 61, 62, and 63 illustrated in FIGS. 2A and 2B,FIGS. 4A and 4B, or FIGS. 5A and 5B may be cleaning apparatuses forbatch process. A cleaning apparatus 64 illustrated in FIGS. 6A and 6Bmay be a cleaning apparatus for single wafer process. The cleaningapparatus 64 is provided with linear portions 56 a, 56 b, and 56 c whichextend in three directions from a hub 54 having an opening 55 in thecenter thereof. Upper projections 51 a, 51 b, and 51 c, which are to bebrought into contact with the back surface of a semiconductor substrate,are provided on the upper surface side of the linear portions 56 a, 56b, and 56 c respectively. The upper projections 51 a, 51 b, and 51 ceach have a convexly curved top. Stoppers 53 a, 53 b, and 53 c, whichrestrain movement of the semiconductor substrate in the horizontaldirection, are provided on the upper surface side of the linear portions56 a, 56 b, and 56 c respectively. Lower projection 52 a, 52 b, and 52 care provided on the lower surface side of the linear portion 56 a, 56 b,and 56 c respectively. The upper projections 51 a, 51 b, and 51 c mayhave substantially the same height. The lower projections 52 b and 52 cmay have substantially the same height. The height of the lowerprojection 52 a may be smaller than the height of the lower projections52 b and 52 c. A handle 57 is provided on the end of the linear portion56 a.

When acid cleaning is performed using the cleaning apparatus 64, asemiconductor substrate is placed on the upper projections 51 a, 51 b,and 51 c, and using the handle 57, the cleaning apparatus 64 is immersedin a cleaning solution filled in a cleaning tank. When the cleaningapparatus 64 is placed on the bottom of the cleaning tank, because ofthe difference in height among the lower projections 52 a, 52 b, and 52c, a direction normal to the surface of the semiconductor substrate isinclined from the vertical direction. Bubbles generated on the lowersurface of the semiconductor substrate may easily slip out upward, andthe surface may be cleaned with high efficiency. The angle of the normaldirection of the surface of the semiconductor substrate with respect tothe vertical direction may be 10° to 80°. When the angle is less than10°, bubbles may be retained on the surface facing downward in thevertical direction. When the angle exceeds 80°, bubbles generated on thelower portion of the surface facing upward in the vertical direction maypass in the vicinity of the surface and float up, resulting inoccurrence of uneven cleaning. The inclination of the semiconductorsubstrate may be produced by the difference in height among the upperprojections. Alternatively, the inclination of the semiconductorsubstrate may be produced by the differences in height among the upperprojections and among the lower projections.

FIGS. 7A and 7B each illustrate exemplary residual particles. FIG. 7Aillustrates residual particles when cleaning is performed using acleaning apparatus which does not have an inclination with respect to asemiconductor substrate. FIG. 7B illustrates residual particles on asemiconductor substrate when acid cleaning is performed using a cleaningapparatus 64 illustrated in FIGS. 6A and 6B. In FIG. 7B, a larger amountof particles may be removed.

Before cleaning is performed, a cleaning apparatus may be subjected toultraviolet treatment. Before a semiconductor substrate is placed in acleaning apparatus, a carrier unit used for carrying the semiconductorsubstrate may be subjected to ultraviolet treatment. Before spin dryingis performed subsequent to acid cleaning, a unit used for spin dryingmay be subjected to drying treatment.

The number of components included in a cleaning apparatus may be small.Components included in a cleaning apparatus may be integrated. When thenumber of components is large, foreign substances and the like that havefallen off owing to cleaning may remain in connections between thecomponents, resulting in contamination of the semiconductor substrate.

A GaN-based HEMT fabricated using the cleaning apparatus described abovemay be used, for example, for a high-output amplifier. FIG. 8illustrates an exemplary high-output amplifier. A source terminal 81 scoupled to a source electrode is provided on a surface of a package. Agate terminal 81 g coupled to a gate electrode and a drain terminal 81 dcoupled to a drain electrode extend from side surfaces of the package.

A GaN-based HEMT fabricated using the cleaning apparatus described abovemay be used, for example, for a power supply device. FIG. 9A illustratesan exemplary power factor correction (PFC) circuit. FIG. 9B illustratesan exemplary power supply device. The power supply device illustrated inFIG. 9B may be a server power supply and may include the PFC circuitillustrated in FIG. 9A.

As illustrated in FIG. 9A, a PFC circuit 90 includes a capacitor 92coupled to a diode bridge 91 to which alternating current (AC) power iscoupled. One terminal of a choke coil 93 is coupled to one terminal ofthe capacitor 92. One terminal of a switching element 94 and an anode ofa diode 96 are coupled to another terminal of the choke coil 93. Theswitching element 94 may be a HEMT fabricated using the cleaningapparatus described above, and one terminal thereof may correspond to adrain electrode of the HEMT. Another terminal of the switching element94 may correspond to a source electrode of the HEMT. One terminal of acapacitor 95 is coupled to a cathode of the diode 96. Another terminalof the capacitor 92, the other terminal of the switching element 94, andanother terminal of the capacitor 95 are grounded. Direct current (DC)power is drawn between the terminals of the capacitor 95.

As illustrated in FIG. 9B, the PFC circuit 90 may be incorporated into aserver power supply 100 or the like.

A PFC circuit may be used for a power supply device which operates athigh speed, such as the server power supply 100 illustrated in FIG. 9B.A switching element, such as the switching element 94, may be used for aswitching power supply or electronic device. The semiconductor devicemay be used as a component for a full bridge power circuit, such as aserver power circuit.

The substrate may be a silicon carbide (SiC) substrate, sapphiresubstrate, silicon substrate, GaN substrate, GaAs substrate, or thelike. The substrate may be conductive, semi-insulating, or insulating.

The structure of the gate electrode, the source electrode, or the drainelectrode may be, for example, single-layered. When ohmiccharacteristics are obtained, heat treatment after formation of thesource electrode and the drain electrode may be omitted. The gateelectrode may be subjected to heat treatment.

The cleaning apparatus described above may be applied to fabrication ofa semiconductor device other than a GaN-based HEMT.

Example embodiments of the present invention have now been described inaccordance with the above advantages. It will be appreciated that theseexamples are merely illustrative of the invention. Many variations andmodifications will be apparent to those skilled in the art.

1. A method of manufacturing a semiconductor device comprising: holdinga semiconductor substrate with a surface inclined with respect to thevertical direction and the horizontal direction; and immersing thesemiconductor substrate in a cleaning solution including an acid.
 2. Themethod of manufacturing a semiconductor device according to claim 1,further comprising, forming a compound semiconductor layer on thesemiconductor substrate before holding the semiconductor substrate. 3.The method of manufacturing a semiconductor device according to claim 2,further comprising, forming a recess in the compound semiconductor layerbefore holding the semiconductor substrate.
 4. The method ofmanufacturing a semiconductor device according to claim 3, furthercomprising, forming a gate-insulating film on the inner surface of therecess before holding the semiconductor substrate.
 5. The method ofmanufacturing a semiconductor device according to claim 1, wherein theinclination angle with respect to the vertical direction is 10° to 80°and the inclination angle with respect to the horizontal direction is10° to 80°.
 6. The method of manufacturing a semiconductor deviceaccording to claim 1, further comprising, placing the semiconductorsubstrate in a cleaning apparatus which includes a supporting member forsupporting the semiconductor substrate and a locking member for lockingthe semiconductor substrate inclined with respect to the verticaldirection and the horizontal direction.
 7. The method of manufacturing asemiconductor device according to claim 6, further comprising, rotatinga case which houses the supporting member and the locking member.
 8. Themethod of manufacturing a semiconductor device according to claim 6,further comprising, rotating a rotary driving member in contact with thesemiconductor substrate.
 9. The method of manufacturing a semiconductordevice according to claim 6, further comprising, performing aultraviolet treatment on the cleaning apparatus before the semiconductorsubstrate is placed in the cleaning apparatus.
 10. The method ofmanufacturing a semiconductor device according to claim 6, furthercomprising, performing a ultraviolet treatment on a carrier unit forcarrying the semiconductor substrate to the cleaning apparatus beforethe semiconductor substrate is placed in the cleaning apparatus.
 11. Themethod of manufacturing a semiconductor device according to claim 1,further comprising, performing spin drying on the semiconductorsubstrate after an immersion of the semiconductor substrate.
 12. Themethod of manufacturing a semiconductor device according to claim 11,further comprising, performing drying treatment on a unit used for thespin drying before spin drying of the semiconductor substrate.
 13. Amethod of cleaning a semiconductor substrate comprising: holding asemiconductor substrate with a surface inclined with respect to thevertical direction and the horizontal direction; and immersing thesemiconductor substrate in a cleaning solution containing an acid. 14.The method of cleaning a semiconductor substrate according to claim 13,wherein the inclination angle with respect to the vertical direction is10° to 80° and the inclination angle with respect to the horizontaldirection is 10° to 80°.
 15. The method of cleaning a semiconductorsubstrate according to claim 13, further comprising, placing thesemiconductor substrate in a cleaning apparatus which includes asupporting member for supporting the semiconductor substrate and alocking member for locking the semiconductor substrate inclined withrespect to the vertical direction and the horizontal direction.
 16. Themethod of cleaning a semiconductor substrate according to claim 15,further comprising, rotating the cleaning apparatus.
 17. The method ofcleaning a semiconductor substrate according to claim 15, furthercomprising, rotating a rotary driving member in contact with thesemiconductor substrate.
 18. A cleaning apparatus comprising: asupporting member to support a semiconductor substrate; and a lockingmember to lock the semiconductor substrate such that the semiconductorsubstrate is inclined with respect to the vertical direction and thehorizontal direction.
 19. The cleaning apparatus according to claim 18,further comprising, a rotary driving member to rotate the semiconductorsubstrate by rotating a case that houses the supporting member and thelocking member.
 20. The cleaning apparatus according to claim 18,further comprising, a rotary driving member, being in contact with thesemiconductor substrate, to rotate the semiconductor substrate in thecleaning apparatus.